Explore key principles of digital electronics with this quiz on SR, JK, D, and T flip-flops. Assess your understanding of flip-flop operations, characteristic behaviors, and applications essential for sequential circuit design.
In an SR (Set-Reset) latch built from NOR gates, what is the output when both S and R inputs are set to logic high (1)?
Explanation: When both S and R inputs of a NOR-gate based SR latch are high, both outputs go low, violating the Q and Q̅ complementarity and creating an invalid condition. The outputs do not reliably settle to set or reset, leading to undefined behavior. Answer B and D are typical for the proper 'set' and 'reset' inputs, but not when both inputs are high. Answer C is incorrect as the latch does not toggle automatically.
Given a JK flip-flop with J = 1 and K = 1, and a clock pulse is applied, what happens to the output Q?
Explanation: With J and K both set to 1, the JK flip-flop toggles its output on the clock edge, which means Q switches from 0 to 1 or from 1 to 0. Setting J or K individually would either set or reset the output, as noted in options B and C, but not when both are high. Option D is incorrect because the output only holds its state when both J and K are 0.
If a D flip-flop receives logic ‘1’ at the D input just before a clock pulse occurs, what will the output Q be immediately after the pulse?
Explanation: The D flip-flop transfers the state of the D input to the Q output upon the clock edge, so if D is 1, Q will be set to 1 just after the clock. Option B is incorrect since Q only becomes 0 if D is 0 at the clock; C is wrong because toggling does not occur in D flip-flops. D (undefined) does not apply, as D flip-flops avoid undefined outputs.
Which of the following correctly expresses the next state (Qₙ₊₁) of a T (Toggle) flip-flop based on its current state (Qₙ) and input T?
Explanation: The T flip-flop follows the equation Q next equals Q XOR T; when T is 1, the output toggles, and when T is 0, it holds its value. The AND operation (option B) describes a different logical function, not suitable for a toggle flip-flop. OR and NAND (options C and D) do not produce the correct toggling characteristic of the T flip-flop.
Which of the following is a common application of a chain of T flip-flops in digital circuits?
Explanation: T flip-flops are ideal for constructing binary counters, where each flip-flop divides the frequency of a clock signal. Priority encoders and analog-to-digital converters use other structures and do not rely on series T flip-flops (options B and C). Exclusive-OR gates (option D) are basic logic gates, not sequential storage elements.